Easy Z80 SBC V1.1 with RC2014 Bus
EASY Z80 Single Board Computer V1.1 with RC2014-Bus Interface
Author: Max Malinov & Sergey Kiselev (also author of ZETA SBC V2)
Projectpage: https://github.com/skiselev/easy_z80
Specifications:
Processor: Zilog Z80 CPU (CMOS version - Z84C00)
Memory: 512 KB battery-backed SRAM, 512 KB Flash ROM
I/O:
- Zilog Z80 CTC - Programmable timer used for periodic interrupts and (optionally) for generating UART clock
- Zilog Z80 SIO - Dual channel serial interface, used for console and for connecting to other peripheral devices
Bus: RC2014 compatible
Microprocessor-Supervisor:
- Reset generation
- SRAM battery backup
- Power failure NMI
- Watchdog (optional)
BIOS and OS:
Easy Z80 is supported by RomWBW v2.9.1 and later. RomWBW includes BIOS, CP/M-80 2.2, Z-System, and a collection of utilities. It also should be possible to run FUZIX on this board.
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EASY Z80 Single Board Computer V1.1 with RC2014-Bus Interface
Author: Max Malinov & Sergey Kiselev (also author of ZETA SBC V2)
Projectpage: https://github.com/skiselev/easy_z80
Specifications:
Processor: Zilog Z80 CPU (CMOS version - Z84C00)
Memory: 512 KB battery-backed SRAM, 512 KB Flash ROM
I/O:
- Zilog Z80 CTC - Programmable timer used for periodic interrupts and (optionally) for generating UART clock
- Zilog Z80 SIO - Dual channel serial interface, used for console and for connecting to other peripheral devices
Bus: RC2014 compatible
Microprocessor-Supervisor:
- Reset generation
- SRAM battery backup
- Power failure NMI
- Watchdog (optional)
BIOS and OS:
Easy Z80 is supported by RomWBW v2.9.1 and later. RomWBW includes BIOS, CP/M-80 2.2, Z-System, and a collection of utilities. It also should be possible to run FUZIX on this board.
SPLD Fuse Map:
Easy Z80 uses an ATF16V8/GAL16V8 SPLD (U9) for address decode logic.
The SPLD fuse map and the SPLD source code are provided in the SPLD directory of the project page and can be written to the 16V8 GAL with most EPROM writers like TL866.